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International Journal of High Performance Computing Applications
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A New Hardware Monitor Design to Measure Data Structure-Specific Cache Eviction Information

B. R. Buck

Symantec Corporation, 6750 Alexander Bell Drive, Columbia, MD 21045 BUCK{at}CS.UMD.EDU

J. K. Hollingsworth

Computer Science Department, University of Maryland, College Park, MD 20742

In this paper, we propose a hardware performance monitor that provides support not only for measuring cache misses and the addresses associated with them, but also for determining what data is being evicted from the cache when a miss occurs. We describe how to use this hardware support to efficiently determine the cache behavior of application data structures at the source code level. We also present the results of a simulation-based study of this technique, in which we examined the overhead, perturbation of results, and usefulness of collecting this information.

Key Words: Memory • cache • evictions • performance • monitor

International Journal of High Performance Computing Applications, Vol. 20, No. 3, 353-363 (2006)
DOI: 10.1177/1094342006067470
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